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  p-dip-16-4 / -5 / -8 p-dso-14-8 1-a dc motor driver for servo driver applications tle 4206 data sheet 1 2000-03-01 description the tle 4206 is a fully protected h-bridge driver designed specifically for automotive headlight beam control and industrial servo control applications. the part is built using the siemens bipolar high voltage power technology dopl. the standard enhanced power p-dso-14 package meets the application requirements and saves pcb-board space and costs. a p-dip-16 package is also available. the servo-loop-parameter pos.- and neg. hysteresis, pos.- and neg. deadband and angle-amplification are programmable with external resitors. an internal window-comparator controls the input line. in the case of a fault condition, like short circuit to gnd, short circuit to supply-voltage, and broken wire, the tle 4206 stops the motor immediately (brake condition). the ?programable current-peak-blanking? disables the servo-loop during the v s voltage drop caused by the stall current spike. so there is no need of an electrolytic blocking capacitor at the v s -terminal. furthermore the built in features like over- and undervoltage-lockout, short-circuit- protection and over-temperature-protection will open a wide range of automotive- and industrial applications. overview features  optimized for headlight beam control applications  current-peak-blanking (no electrolytic capacitor at v s )  delivers up to 0.8 a continuous  low saturation voltage ; typ.1.2 v total @ 25 c; 0.4 a  output protected against short circuit  overtemperature protection with hysteresis  over- and undervoltage lockout  no crossover current  internal clamp diodes  enhanced power packages type ordering code package tle 4206 q67000-a9303 p-dip-16-5 tle 4206 g q67006-a9299 p-dso-14-8
tle 4206 data sheet 2 2000-03-01 figure 1 pin configuration (top view) pin definitions and functions pin no. p-dso-14-8 pin no. p-dip-16-5 symbol function 1 1 fb feedback input 2 2 hyst hysteresis i/o 3, 4, 5, 10, 11, 12 4, 5, 6, 11, 12, 13 gnd ground 6 7 out1 power output 1 78 cpb current peak blanking input 89 v s power supply voltage 9 10 out2 power output 2 13 15 range range input 14 16 ref reference input ? 3, 14 n.c. not connected aep02261 cpb 10 9 1 2 3 4 5 6 7 v 14 13 12 11 8 out1 gnd hyst fb out2 gnd range ref gnd gnd gnd gnd s aep02262 s v cpb 16 15 8 out2 11 12 13 7 14 6 5 4 3 2 1 9 10 out1 gnd n.c. hyst fb gnd n.c. range ref gnd gnd gnd gnd p-dso-14-8 p-dip-16-5
tle 4206 data sheet 3 2000-03-01 figure 2 block diagram (pin numbers are valid for tle 4206 g in p-dso-14-8) aeb02258 s v out1 out2 6 9 and logic protection 8 10,11,12 gnd 7 cpb range- amp amp hyst- amp servo- 13 range ref 14 hyst 2 fb 1 tle 4206g 3,4,5, half- bridge half- bridge
tle 4206 data sheet 4 2000-03-01 absolute maximum ratings note: maximum ratings are absolute ratings; exceeding any one of these values may cause irreversible damage to the integrated circuit. parameter symbol limit values unit remarks min. max. voltages supply voltage v s ? 0.3 45 v ? supply voltage v s ? 1 ? v t < 0.5 s; i s > ? 2a logic input voltages (fb, ref, range, hyst, cpb) v i ? 0.3 20 v ? currents output current (out1, out2) i out ?? a internally limited output current (diode) i out ? 11 a ? input current (fb, ref, range, hyst) i in ? 2 ? 6 2 6 ma ma t < 2 ms; t / t < 0.1 temperatures junction temperature t j ? 40 150 c ? storage temperature t stg ? 50 150 c ? thermal resistances junction pin (p-dso-14-8) r thj-pin ? 25 k/w measured to pin 5 junction ambient (p-dso-14-8) r thja ? 65 k/w ? junction pin (p-dip-16-5) r thj-pin ? 15 k/w measured to pin 5 junction ambient (p-dip-16-5) r thja ? 60 k/w ?
tle 4206 data sheet 5 2000-03-01 operating range parameter symbol limit values unit remarks min. max. supply voltage v s 818vafter v s rising above v uv on supply voltage increasing v s ? 0.3 v uv on v outputs in tristate supply voltage decreasing v s ? 0.3 v uv off v outputs in tristate output current i out1-2 ? 0.8 0.8 a ? input current (fb, ref) i in ? 50 500 a ? junction temperature t j ? 40 150 c ?
tle 4206 data sheet 6 2000-03-01 electrical characteristics 8 v < v s < 18 v; i out1-2 = 0 a; ? 40 c < t j < 150 c (unless otherwise specified) parameter symbol limit values unit test condition min. typ. max. current consumption supply current i s ? 12 20 ma ? supply current i s ? 20 30 ma i out1 = 0.4 a i out2 = ? 0.4 a supply current i s ? 30 50 ma i out1 = 0.8 a i out2 = ? 0.8 a over- and under voltage lockout uv switch on voltage v uv on ? 7.4 8 v v s increasing uv switch off voltage v uv off 6.3 6.9 ? v v s decreasing uv on/off hysteresis v uvhy ? 0.5 ? v v uv on ? v uv off ov switch off voltage v ov off ? 20.5 23 v v s increasing ov switch on voltage v ov on 17.5 20 ? v v s decreasing ov on/off hysteresis v ovhy ? 0.5 ? v v ov off ? v ov on
tle 4206 data sheet 7 2000-03-01 outputs out1-2 saturation voltages source (upper ) i out = ? 0.2 a v sat u ? 0.85 1.15 v t j = 25 c source (upper ) i out = ? 0.4 a v sat u ? 0.90 1.20 v t j = 25 c sink (upper) i out = ? 0.8 a v sat u ? 1.10 1.50 v t j = 25 c sink (lower) i out = 0.2 a v sat l ? 0.15 0.23 v t j = 25 c sink (lower) i out = 0.4 a v sat l ? 0.25 0.40 v t j = 25 c sink (lower) i out = 0.8 a v sat l ? 0.45 0.75 v t j = 25 c total drop i out = 0.2 a v sat ? 1.0 1.4 v v sat = v sat u + v sat l total drop i out = 0.4 a v sat ? 1.2 1.7 v v sat = v sat u + v sat l total drop i out = 0.8 a v sat ? 1.6 2.5 v v sat = v sat u + v sat l clamp diodes forward voltage; upper v fu ? 11.5v i f = 0.4 a upper leakage current i lku ?? 5ma i f = 0.4 a forward voltage; lower v fl ? 0.9 1.4 v i f = 0.4 a electrical characteristics (cont ? d) 8 v < v s < 18 v; i out1-2 = 0 a; ? 40 c < t j < 150 c (unless otherwise specified) parameter symbol limit values unit test condition min. typ. max.
tle 4206 data sheet 8 2000-03-01 input-interface input ref quiescent voltage v refq ? 200 ? mv i ref = 0 a input resistance r ref ? 6 ? k ? 0 v < v ref < 0.5 v input fb quiescent voltage v fbq ? 200 ? mv i fb = 0 a input resistance r fb ? 6 ? k ? 0 v < v fb < 0.5 v input/output hyst current amplification a hyst = i hyst / ( i ref ? i fb ) a hyst 0.8 0.95 1.1 ? ? 20 a < i hyst < ? 10 a; 10 a < i hyst < 20 a; i ref = 250 a v hyst = v s / 2 current offset i hystio ? 20.353 a i ref = i fb = 250 a v hyst = v s / 2 threshold voltage high v hyh / v s ? 52 ? % ? deadband voltage high v dbh / v s ? 50.4 ? % ? deadband voltage low v dbl / v s ? 49.6 ? % ? threshold voltage low v hyl / v s ? 48 ? % ? hysteresis window v hyw / v s 345%( v hyh ? v hyl )/ v s deadband window v dbw / v s 0.4 0.8 1.2 % ( v dbh ? v dbl )/ v s electrical characteristics (cont ? d) 8 v < v s < 18 v; i out1-2 = 0 a; ? 40 c < t j < 150 c (unless otherwise specified) parameter symbol limit values unit test condition min. typ. max.
tle 4206 data sheet 9 2000-03-01 input range input current i range ? 1 ? 1 a0v < v range < v s switch-off voltage high v offh ? 25 0 100 mv refer to v s switch-off voltage low v offl 300 400 500 mv refer to gnd input cpb (current peak blanking) charge current i cpbch ? 6.5 ? a v hyl > v hyst ; v cpb = 0 v low voltage v cpbl ? 20 100 mv v hyl < v hyst < v hyh high voltage threshold v cpbh 55.76.5v v hyl > v hyst clamp voltage v cpbc ? 6.2 ? v v hyl > v hyst blanking time t cpb ? 40 ? ms c cpb = 47 nf thermal shutdown thermal shutdown junction temperature t jsd 150 175 200 c ? thermal switch-on junction temperature t jso 120 ? 170 c ? temperature hysteresis ? t ? 30 ? k ? electrical characteristics (cont ? d) 8 v < v s < 18 v; i out1-2 = 0 a; ? 40 c < t j < 150 c (unless otherwise specified) parameter symbol limit values unit test condition min. typ. max.
tle 4206 data sheet 10 2000-03-01 figure 3 application circuit (pin numbers are valid for tle 4206g in p-dso-14-8) aes02259 s v m out1 out2 6 9 and logic protection 8 10,11,12 gnd 7 cpb range- amp amp hyst- amp servo- cpb c 100 k c 470 nf s dz 36 v dr 1n4001 13 range ref 14 hyst 2 fb 1 r hyl r fb 47 nf ? 50 k ? 50 k r ref ? r r ? 50 k r 100 k ? hyh v refin gnd v b + r ref p fb tle 4206g 3,4,5, half- bridge half- bridge v + b 1 k ? 1 k ?
tle 4206 data sheet 11 2000-03-01 figure 4 hysteresis, phaselag and deadband-definitions aed02260 motor v expressions: out1 v = hy v out2 - -2.0% -0.4% 2.0% 0.4% fb ref v ( v -)/ v s ccw turn brake turn cw dbw hyw dbl dbh = hysteresis deadband db = high h= low l= window w= status motor hyl hyh
tle 4206 data sheet 12 2000-03-01 figure 5 timing and phaselag aed02314 v offh s( v hyh v dbh v fb( v dbl v hyl v offl v s v testconditions: b v = ; no revers polarity voltage diode 100 k hyh rr = hyl = ? ; rr ref = fb = ? 50 k t t t ) ) v ref( t ) cpbc v cpbh v cpbl v start-command stop-command blanking-time t t out2 v h l cpb t cpb t cpb t cpb t l out1 v h t brake ccw brake cw brake cw brake ccw motor status cpb( v ) t
tle 4206 data sheet 13 2000-03-01 package outlines p-dso-14-8 (plastic dual small outline package) gps09222 orts of packing ackage outlines for tubes, trays etc. are contained in our ata book ? package information ? . dimensions in mm smd = surface mounted device
tle 4206 data sheet 14 2000-03-01 orts of packing ackage outlines for tubes, trays etc. are contained in our ata book ? package information ? . dimensions in mm 0.25 6.35 8.9 0.25 1 +0.1 7.87 0.38 1.7 max 2.54 0.38 min 4.37 max 3.25 min 0.46 0.1 19.05 0.25 gpd05585 16 9 1 8 index marking 0.25 16x 1) does not include plastic or metal protrusion of 0.25max per side 1) 1) p-dip-16-5 (plastic dual in-line package)


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